1. Field of the Invention
The present invention relates to a method of fabricating a gate structure, and more particularly, to a method of fabricating a metal gate structure.
2. Description of the Prior Art
With a trend towards scaling down the complementary metal oxide semiconductor (CMOS) size, conventional methods used to achieve optimization, such as reducing thickness of the gate dielectric layer, for example the thickness of silicon dioxide layer, have faced problems such as leakage current due to tunneling effect. In order to keep progression to next generation, high-K materials are used to replace the conventional silicon oxide (SiO2) or silicon-oxy-nitride (SiON) to be the gate dielectric layer because it decreases physical limit thickness effectively, reduces leakage current, and obtains equivalent capacitor in an identical equivalent oxide thickness (EOT).
Additionally, current metal-oxide-semiconductor field-effect transistors (MOSFETs) often utilize polysilicon to make a gate. A doped polysilicon gate has problems, however, such as a depletion effect of the polysilicon gate, and boron penetrates through the channel.
Take the depletion effect of the poly-silicon gate as an example. When the polysilicon gate is in an inversion, carrier depletion occurs between the polysilicon gate and the gate dielectric layer. If this polysilicon gate has the afore-mentioned depletion effect, the effect of the gate capacitance will decrease, but a high quality metal oxide semiconductor transistor (MOS transistor) should have a high gate capacitance. If the gate capacitance is high, more electric charge will accumulate in two sides of the gate capacitance. More electric charge therefore accumulates in the channel, so when the metal oxide semiconductor transistor (MOS transistor) has a bias voltage, the speed of the electric current between the source/drain will be improved.
To avoid the above-mentioned depletion effect and boron penetrates of the polysilicon gate; the current industry devotes to investigate into utilizing a metal gate to replace the polysilicon gate, namely, utilizing metal materials to replace the polysilicon materials used in the polysilicon gate, so as to resolve the aforesaid problems and also to decrease the resistivity of the gate.
Therefore, plenty of new metal materials have been found. For example, double work function metals are used to replace the conventional polysilicon gate to be the control electrode that competent to the high-K gate dielectric layer. Besides, critical requirements for those metal materials include thermal stability with the gate dielectric and suitable values for the interfacial work function (˜4.0 eV and ˜5.0 eV for bulk-Si NMOS and PMOS devices respectively). Accordingly, how to combine those metal gates with the current manufacture process of the MOS transistors has become another important challenge for the current industry.